Gen 2 PCI Express End Point (GPEX-EP) with SR-IOV and ARI Support*
GDA's PCI Express End Point Controller is a highly flexible and configurable design targeted for end-point implementations in desktop, server, mobile, networking and telecom applications. The controller architecture is carefully tailored to optimize link utilization, latency, reliability, power consumption, and silicon footprint.
GPEX-EP is part of GDA's PCIExpress (GPEX) family of IP solutions, which includes End Point (GPEX-EP), Root Complex (GPEX-RC), Hybrid (GPEX-HY), Switch port Controller (GPEX-SW), Switch (GPEX-SWITCH) and Advanced Switching (GPEX-AS) designs.
The controller's simple, configurable and layered architecture is independent of application logic, PHY designs, implementation tools and, most importantly, the target technology. GDA solution allows the licensees to easily migrate among FPGA, Gate array and Standard cell technologies optimally. Its flexible backend interface makes it easy to be integrated into wide range of applications.
Click here to view the block diagram
Features:
- Compliant to PCI Express base specification version 2.0* (5.0 Gbps)
- Supports SR-IOV and complaint to Single Root I/O Virtualization and Sharing Specification Revision 1.0
- Implements transaction, data link and physical layers
- Supports multiple lanes: x1, x2, x4, x8 or x16
- Architected for high link utilization and low latency
- Implements flow control logic for both directions
- Packet oriented user logic interface
- Supports PIPE based PHY architecture
- Optional DMA controller on the user logic side
- Flexible lane ordering and support for lane reversal
- Supports configurable number of VFs for SR-IOV
- Supports configurable number of PFs for SR-IOV
- Programmable VF/PF assignment
- Supports FLR
- Efficient receive and transmit-retry buffering scheme
- Completely handles PCI-Express ordering rules
* - Rambus IP; Sold under GDA’s Re-seller agreement with Rambus, Inc.
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